OpenOCD のバックアップの現在との差分(No.4)

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• バックアップ一覧
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• OpenOCD へ行く。
  • 1 (2009-09-25 (金) 06:03:14)
  • 2 (2009-09-25 (金) 11:10:37)
  • 3 (2009-10-08 (木) 10:51:40)
  • 4 (2009-10-15 (木) 04:45:03)
  • 5 (2009-10-22 (木) 13:44:54)
  • 6 (2009-10-23 (金) 07:50:28)
  • 7 (2016-10-17 (月) 12:05:00)
  • 8 (2016-10-17 (月) 23:55:02)
  • 9 (2016-10-18 (火) 06:44:03)
  • 10 (2016-10-18 (火) 11:02:22)

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*試したCFGファイル [#s33146f7]
reset_config srst_only srst_pulls_trst
It's a plsueare to find someone who can identify the issues so clearly http://pemivlmxfoj.com [url=http://ymyvqvzr.com]ymyvqvzr[/url] [link=http://nmizzytf.com]nmizzytf[/link]

if { [info exists CHIPNAME] } {   
   set  _CHIPNAME $CHIPNAME   
} else {   
   set  _CHIPNAME AT91SAM7L128
}

if { [info exists ENDIAN] } {   
   set  _ENDIAN $ENDIAN   
} else {   
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
#   set _CPUTAPID 0x3f0f0f0f
#   set _CPUTAPID 0x27330740
#   set _CPUTAPID 0x05B1E03F
   set _CPUTAPID 0x3F0F0F0F
 
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank at91sam7 0 0 0 0 0

init
*Windowsでチェック [#tcaa5792]
http://homepage3.nifty.com/zus/OpenOCD_Build_win32_Flame.html
*動作した場合 [#fb35b4c5]
**サーバ側 [#i0af4ad7]
 USER@9OPBKJD8G1TGD79 /home/openocd
 $ openocd -f arm-usb-ocd.cfg  -f at91sam7lx.cfg
 Open On-Chip Debugger 0.3.0-in-development (2009-09-25-18:14) svn:unknown
 $URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
 For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
 Warn : use 'at91sam7s.cpu' as target identifier, not '0'
 Info : device: 4 "2232C"
 Info : deviceID: 364511235
 Info : SerialNumber: FTS5MVKAA
 Info : Description: Olimex OpenOCD JTAG A
 Info : clock speed 6000 kHz
 Info : JTAG tap: at91sam7s.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0
 xf0f0, ver: 0x3)
 Error: invalid mode value encountered 0
 Error: cpsr contains invalid mode value - communication failure
 target state: halted
 target halted in Thumb state due to watchpoint, current mode: System
 cpsr: 0xffffffff pc: 0xffffffef
 Info : accepting 'telnet' connection from 0
 Runtime error, file "command.c", line 473:
     Unknown command: scan_chaim
      TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMas
 k Instr
  ---|--------------------|---------|------------|------------|------|------|-----
 -|---------
  0 | at91sam7s.cpu      |    Y    | 0x3f0f0f0f | 0x3f0f0f0f | 0x04 | 0x01 |  0x0f
  | 0x0c
 Error: invalid mode value encountered 0
 Error: cpsr contains invalid mode value - communication failure　（ここで接続を外している）
      TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMas
 k Instr
 ---|--------------------|---------|------------|------------|------|------|-----
 -|---------
  0 | at91sam7s.cpu      |    Y    | 0x3f0f0f0f | 0x3f0f0f0f | 0x04 | 0x01 |  0x0f
  | 0x0c

**クライアント側 [#x139a8a5]
> scan_chain
     TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMas
k Instr
---|--------------------|---------|------------|------------|------|------|-----
-|---------
 0 | at91sam7s.cpu      |    Y    | 0x3f0f0f0f | 0x3f0f0f0f | 0x04 | 0x01 | 0x0f
 | 0x0c
invalid mode value encountered 0
cpsr contains invalid mode value - communication failure  (ここで接続を外している)
> scan_chain
     TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMas
k Instr
---|--------------------|---------|------------|------------|------|------|-----
-|---------
 0 | at91sam7s.cpu      |    Y    | 0x3f0f0f0f | 0x3f0f0f0f | 0x04 | 0x01 | 0x0f
 | 0x0c
>
*HP20b.cfg [#l7055e11]
#interface
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME at91sam7s
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-init {
        soft_reset_halt
        # RSTC_CR : Reset peripherals
        mww 0xfffffd00 0xa5000004
        # disable watchdog
	mww 0xfffffd44 0x00008000
	# enable user reset
	mww 0xfffffd08 0xa5000001
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=73)
	mww 0xffffff60 0x00490100
	sleep 100
}

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432

# For more information about the configuration files, take a look at:
# openocd.texi

*20091008 [#e80a95ae]
**jtag_speed [#id6206cf]
jtag_speed 0を入れると安定した
jtag_speedは　Deprecated/Removed Commands　だそうだが、使える。
 cf, http://openocd.berlios.de/doc/html/Upgrading.html#Upgrading


また、jtag_speed 0 は max speedとなるのだが、速度を遅くした方が動作が不安定になるのが不思議。
また、jtag_speedを指定しないと6000khzになる。jtag_speed 0を指定した時と同じ条件のはずだがどうして動作が違うのかという点も謎。
**cfgファイル [#n9ca6ef5]
at91sam7sx.cfgをat91sam7lxとしてコピーして使ったが当然ながらうまくいかない。
データシートを見比べるとリセット関係のレジスタが微妙にずれている。
修正して対応。しかし、at91sam7sxのデータシートが変に誤植していてわけがわからない。
*ねむいさんより [#h74b04db]
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {	
   set  _CHIPNAME $CHIPNAME    
} else {	 
   set  _CHIPNAME sam7x256
}

if { [info exists ENDIAN] } {	
   set  _ENDIAN $ENDIAN    
} else {	 
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-init { 
	# disable watchdog
	mww 0xfffffd44 0x00008000	
	# enable user reset
	mww 0xfffffd08 0xa5000001	
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601	
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e 	
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007	
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=60)
	mww 0xffffff60 0x003c0100	
	sleep 100
	jtag_khz 1500
：}

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0



#
# scipts/macros/user commands - this is TCL (variant JIM):
#
proc mt_internal_rc {} {
	jtag_khz 5
	halt
	sleep 10

	# Init - taken form the script openocd_at91sam7_ecr.script 
	mww 0xfffffd44 0x00008000	# disable watchdog
	mww 0xfffffd08 0xa5000001	# enable user reset
	mww 0xfffffc20 0x00000601	# CKGR_MOR : enable the main oscillator

	sleep 10
	mww 0xfffffc2c 0x00481c0e 	# CKGR_PLLR: 96.1097 MHz
	sleep 10
	mww 0xfffffc30 0x00000007	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	sleep 10
	mww 0xffffff60 0x003c0100	# MC_FMR: flash mode (FWS=1,FMCN=60)
	# arm7_9 force_hw_bkpts enable	# program resides in flash

	jtag_khz 2000
}


proc mt_flash_bin {IMGFILE OFFSET} {
	mt_internal_rc
	sleep 10
	poll
	flash probe 0
	flash protect 0 0 15 off
	flash write_image erase $IMGFILE $OFFSET
	sleep 10 
	verify_image $IMGFILE $OFFSET
	sleep 10
}

proc mt_flash {IMGFILE} {
	mt_internal_rc
	sleep 10
	poll
	flash probe 0
	flash protect 0 0 15 off
	flash write_image erase $IMGFILE」

	sleep 10
	verify_image $IMGFILE
	sleep 10
}

#verbose check routine for the test
proc flasher {IMGFILE} {
	mt_internal_rc
	sleep 10
	poll
	flash probe 0
	flash erase_check 0
	flash protect 0 0 15 off
	at91sam7 gpnvm 0 2 set
	sleep 10
	flash erase_sector 0 0 15
	sleep 10
	flash erase_check 0
	sleep 10
	flash write_image erase $IMGFILE
	sleep 10
	verify_image $IMGFILE
	sleep 10
}

#verbose check routine for the test
proc eraser {} {
	mt_internal_rc
	sleep 10
	poll
	flash probe 0
	flash erase_check 0
	flash protect 0 0 15 off
	at91sam7 gpnvm 0 2 set
	sleep 10
	flash erase_sector 0 0 15
	sleep 10
	flash erase_check 0
	sleep 10
}

#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432

gdb_memory_map enable
gdb_flash_program enable
arm7_9_dcc downloads enable
arm7_9 fast_memory_access enable
init
#debug_level 3

# For more information about the configuration files, take a look at:
# openocd.texi

     

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